Index: sys/usb/src.km/ucd/ethernat/isp116x.h
===================================================================
RCS file: /mint/freemint/sys/usb/src.km/ucd/ethernat/isp116x.h,v
retrieving revision 1.4
diff -u -8 -p -r1.4 isp116x.h
--- sys/usb/src.km/ucd/ethernat/isp116x.h	11 Mar 2013 19:02:20 -0000	1.4
+++ sys/usb/src.km/ucd/ethernat/isp116x.h	13 Mar 2013 11:23:36 -0000
@@ -58,17 +58,17 @@
 
 #define ISP116x_WRITE_OFFSET	0x80
 
 /* --- Board settings -------------------------------------------------------*/
 
 #define ISP116X_HCD_INT_ACT_HIGH
 //#define ISP116X_HCD_INT_EDGE_TRIGGERED
 //#define ISP116X_HCD_SEL15kRES
-//#define ISP116X_HCD_OC_ENABLE
+#define ISP116X_HCD_OC_ENABLE
 //#define ISP116X_HCD_REMOTE_WAKEUP_ENABLE
 
 #define ISP116X_HCD_USE_UDELAY
 //#define ISP116X_HCD_USE_EXTRA_DELAY
 
 /*
  * ISP116x chips require certain delays between accesses to its
  * registers. The following timing options exist.